1. Field of the Invention
This invention relates to computer systems and, more particularly, to memory bus interfaces that accommodate data transfers between a motherboard and peripheral boards.
2. Description of the Relevant Art
A variety of peripheral boards are available for personal computer systems that expand the memory and functionality of the motherboard. Such peripherals include disk controller boards, video graphics array (VGA) boards, network interface boards and sound boards.
Each peripheral board is equipped with a connector portion that is insertable into one of a plurality of expansion slots of the PC motherboard. The expansion slots provide internal connections to a peripheral bus incorporated on the motherboard. The peripheral bus as well as a variety of control lines are typically interfaced to the system microprocessor bus via a bus control unit.
The number of bytes accessed by or from a particular peripheral board in a single transfer cycle depends upon the functionality and constraints of the circuitry within the peripheral board. That is, the width of data transfers between a peripheral board and the motherboard may not be the same as the data width accommodated by the microprocessor itself, and the data transfer width of peripheral boards connected within the same system may differ from board to board. For example, although a computer system may be equipped with a microprocessor having a thirty-two bit data bus, some of the peripheral boards connected to the system may be designed to transfer only eight bits of data at a time, while still other peripheral boards within the same system may be designed to transfer sixteen bits of data at a time.
For a system to accommodate a plurality of such peripheral boards having different data widths, the bus controller and/or microprocessor must be cognizant of the data format a particular peripheral board will handle before data transfers can be completed. This is typically accomplished by means of a control signal that is generated by the peripheral board to indicate the type of data transfer it will perform.
The concept described above will be better understood from the following example. Expansion slots within 286- and 386-processor based IBM PC/AT compatible systems are connected to a peripheral bus commonly known as the industry standard architecture or ISA (pronounced eye-sah) bus. FIG. 1A is a diagram of a portion of an IBM PC/AT motherboard that incorporates five ISA bus expansion slots formed by connectors J2-J6, J8, J10-J14 and J16. FIG. 1B is an exploded view of one of the expansion slots and illustrates pin designations and numbers on the ISA bus. Other bus schemes commonly used in 286 and 386 systems are the extended industry standard architecture or EISA (pronounced e-sah) bus and IBM's microchannel architecture or MCA bus.
The ISA bus standard has the advantage that many peripheral boards have been developed for it, and competition has kept the price of such boards low. The ISA bus, however, has only sixteen data lines and twenty-four address lines, so it cannot take full advantage of the 32 bit data and address busses of the 386. This reduces the speed at which data can be transferred on the bus. Most of the ISA based 386 machines have partially solved this problem by incorporating 16 Mbytes or more of 32 bit wide memory and often a cache memory directly on the motherboard. Since this memory can be accessed directly without going through the peripheral bus, it can operate at the full speed of the 386. In these systems, the ISA bus is used only to communicate with peripherals such as disk controller boards, video graphics array boards, network interface boards, and sound boards. Since most of these boards transfer data only eight bits or sixteen bits at a time, the ISA bus limitations do not have an appreciable effect on the overall performance of the system.
The ISA environment has other associated disadvantages. Expansion cards are typically constrained to utilize a limited memory space between 640K and 1 Meg since memory below this range is reserved for operator programs. To fully utilize this limited space, expansion cards would be optimally designed to occupy consecutive address ranges of a size that directly correspond to their addressable storage locations. This is typically not the case, however, since sixteen bit peripheral cards (most VGA cards, for example) must decode the upper local bus address lines LA23-LA17 to assert the necessary data feedback signal MEMCS16 to the ISA bus controller. MEMCS16 is a data indicator signal generated by peripheral cards to indicate that the present data transfer is a one wait-state, sixteen bit memory cycle. The upper local bus address lines LA23-LA17 allow for a resolution of only 128K. Thus, even if the sixteen bit card occupies only 32K of address space, it will assert the feedback signal indicating a sixteen bit access for the entire 128K range. As a result, eight bit peripheral cards cannot reside in that 128K address space since the bus controller would perform a sixteen bit access on the eight bit card and the upper data byte would be invalid data. Hence, due to this constraint, valuable memory space can go unused.
To avoid the waste of memory space and to allow for the numerous peripheral cards that a user may desire, expansion cards must be designed to operate within the unused portion of the 128K space decoded by a sixteen bit memory mapped card since there are no other available blocks of memory (system BIOS and monochrome or graphics screen buffers often occupy the other 128K spaces). Solving this problem is difficult since designers of cards for the ISA bus do not have prior knowledge of the type of other cards that will be integrated in the system. Hence, if they design a sixteen bit card, it could cause a system with eight bit cards to fail. On the other hand, if they design an eight bit card, it could cause systems with sixteen bit cards to fail. In these situations, system integration and end user support is much more difficult and expensive. To exist in the 128K space decoded by another sixteen bit card, the card must be able to perform sixteen bit accesses. This constraint increases the cost of boards that only require an eight bit data bus, the most common example being boards that contain an eight bit BIOS ROM.
A price increase is not the only penalty the designer incurs when going to a sixteen bit interface. Another negative aspect of designing a sixteen bit interface is the fact that the board now always decodes the 128K space. This means if a user previously had only eight bit cards in his system, integration of the new card becomes the cause of the same problem described above for the remaining cards in the system. Thus, compatibility of eight bit and sixteen bit cards within the same system is often hindered.